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PD - 91702B
IRL1004
HEXFET(R) Power MOSFET
Logic-Level Gate Drive Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating l 175C Operating Temperature l Fast Switching l Fully Avalanche Rated Description
l l
D
VDSS = 40V RDS(on) = 0.0065
G
ID = 130A
S
Fifth Generation HEXFET(R) power MOSFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew
Max.
130 92 520 200 1.3 16 700 78 20 5.0 -55 to + 175 300 (1.6mm from case) 10 lbf*in (1.1N*m)
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RCS RqJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.50 ---
Max.
0.75 --- 62
Units
C/W
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1
11/29/99
IRL1004
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient V(BR)DSS RDS(on) VGS(th) gfs IDSS IGSS Qg Q gs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. 40 --- --- --- 1.0 63 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. Max. Units Conditions --- --- V VGS = 0V, ID = 250A 0.04 --- V/C Reference to 25C, ID = 1mA --- 0.0065 VGS = 10V, ID = 78A --- 0.009 VGS = 4.5V, ID = 65A --- --- V VDS = VGS, ID = 250A --- --- S VDS = 25V, ID = 78A --- 25 VDS = 40V, VGS = 0V A --- 250 VDS = 32V, VGS = 0V, TJ = 150C --- 100 VGS = 16V nA --- -100 VGS = -16V --- 100 ID = 78A --- 32 nC VDS = 32V --- 43 VGS = 4.5V, See Fig. 6 and 13 16 --- VDD = 20V 210 --- ID = 78A ns 25 --- RG = 2.5, VGS = 4.5V 14 --- RD = 0.18, See Fig. 10 Between lead, 4.5 --- 6mm (0.25in.) nH G from package 7.5 --- and center of die contact 5330 --- VGS = 0V 1480 --- pF VDS = 25V 320 --- = 1.0MHz, See Fig. 5
D
S
Source-Drain Ratings and Characteristics
IS
I SM
VSD trr Q rr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 130 showing the A G integral reverse --- --- 520 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 78A, VGS = 0V --- 78 120 ns TJ = 25C, IF = 78A --- 180 270 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11) Starting TJ = 25C, L =0.23mH RG = 25, IAS = 78A. (See Figure 12) ISD 78A, di/dt 370A/s, VDD V(BR)DSS, TJ 175C
Pulse width 300s; duty cycle 2% Calculated continuous current based on maximum allowable
junction temperature; for recommended current-handling of the package refer to Design Tip #93-4
2
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IRL1004
10000
I D , Drain-to-Source Current (A)
1000
I D , Drain-to-Source Current (A)
VGS 15V 10V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM 2.7V TOP
1000
VGS 15V 10V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM 2.7V TOP
100
100
10
10
2.7V
1
2.7V
20s PULSE WIDTH TJ = 25 C
1 10 100
0.1 0.1
1 0.1
20s PULSE WIDTH TJ = 175 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.5
ID = 130A
R DS(on) , Drain-to-Source On Resistance (Normalized)
TJ = 25 C
I D , Drain-to-Source Current (A)
2.0
100
TJ = 175 C
1.5
10
1.0
1
0.5
0.1 2.0
V DS = 25 50V 20s PULSE WIDTH 3.0 4.0 5.0 6.0 7.0 8.0 9.0
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRL1004
10000
VGS , Gate-to-Source Voltage (V)
8000
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
12
ID = 78 A
VDS = 32V VDS = 20V
10
C, Capacitance (pF)
6000
Ciss
8
6
4000
Coss
4
2000
Crss
0 1 10 100
2
0 0 30 60 90
FOR TEST CIRCUIT SEE FIGURE 13
120 150 180
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
10000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on) TJ = 175 C
1000 10us 100us 1ms 10 10ms
100
10
TJ = 25 C
1
I D , Drain Current (A)
V GS = 0 V
2.0 2.5 3.0
100
0.1 0.0
0.5
1.0
1.5
1 1
TC = 25 C TJ = 175 C Single Pulse
10 100
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRL1004
140
LIMITED BY PACKAGE
120
VDS VGS RG
RD
D.U.T.
+
I D , Drain Current (A)
100
-VDD
80
4.5V
Pulse Width 1 s Duty Factor 0.1 %
60
40
Fig 10a. Switching Time Test Circuit
VDS 90%
20
0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
Fig 9. Maximum Drain Current Vs. Case Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50
0.20 0.1 0.10 0.05 0.02 0.01 P DM t1 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 t2
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRL1004
L VDS D.U.T. RG + 4.5 V
1800
EAS , Single Pulse Avalanche Energy (mJ)
TOP BOTTOM
1500
ID 32A 55A 78A
VDD
IAS tp
0.01
1200
900
Fig 12a. Unclamped Inductive Test Circuit
600
300
V(BR)DSS tp VDD VDS
0 25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
4.5 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit
6
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IRL1004
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by R G Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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IRL1004 TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415 ) 10.29 (.405 ) 3.78 (.149) 3.54 (.139) -A6.47 (.255 ) 6.10 (.240 ) -B4.69 (.1 85) 4.20 (.1 65) 1.3 2 (.052) 1.2 2 (.048)
2.87 (.113 ) 2.62 (.103 )
4 15.24 (.600 ) 14.84 (.584 )
1.15 (.0 45) MIN 1 2 3
L EA D A S SIG N ME NT S 1 - G AT E 2 - D RA IN 3 - S OU R C E 4 - D RA IN
14 .09 (.55 5) 13 .47 (.53 0)
4 .06 (.16 0) 3 .55 (.14 0)
3X 3X 1 .40 (.05 5) 1 .15 (.04 5)
0.93 (.037 ) 0.69 (.027 ) M BAM
3X
0.55 (.02 2) 0.46 (.01 8)
0.36 (.01 4)
2 .54 (.10 0) 2X N O TE S: 1 D IM EN S IO N ING & TOL ER A NC IN G P ER A N SI Y 14 .5 M, 19 82. 2 C O N TRO LLIN G D IME N S IO N : INC H
2 .9 2 (.11 5) 2 .6 4 (.10 4)
3 O U TLIN E C ON F OR MS TO JE DE C O UT LIN E TO -2 20A B . 4 HE A TS INK & LE AD M E AS U RE M E NTS D O N O T IN CL UD E B UR R S.
TO-220AB Part Marking Information
E X A M P L E : TH IS IS A N IR F1 0 1 0 W IT H A S S E M B L Y LOT C ODE 9B1M
A
IN TE R N A TIO N A L R E C TIF IE R LOGO ASSEMBLY LOT CO DE
PART NU MBER IR F 10 1 0 9246 9B 1M
D A TE C O D E (Y Y W W ) YY = YEAR W W = W EEK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630 IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936 Data and specifications subject to change without notice. 11/99
8
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